SN75176BP: send serial data over two wires with RS-485

A microcontroller's serial port (UART) works fine across a desk, but over tens or hundreds of metres of cable, noise and ground differences corrupt the bits. RS-485 solves that by sending each bit as a voltage difference between two wires. The TI SN75176BP is a classic RS-485/RS-422 transceiver in an 8-pin DIP: one driver and one receiver that share the same pair of wires. This guide explains how differential signalling works, what each pin does, and follows one byte across the bus from start to finish.

The basics: a difference instead of a level

An ordinary logic signal is single-ended: the receiver compares one wire against its own ground. If a motor or a long cable puts 2 V of noise on that wire, or the two ends of the cable sit at slightly different ground potentials, a 0 can turn into a 1.

RS-485 is differential. The driver puts the bit on two wires, A and B, in opposite directions: for a logic 1, A is higher than B; for a logic 0, B is higher than A. The receiver only looks at the difference A − B. Noise induced in a twisted pair lands on both wires almost equally, so it shifts both voltages but hardly changes their difference. The SN75176BP's receiver reports a 1 when A − B is at least +0.2 V and a 0 when it is −0.2 V or lower, with about 50 mV of hysteresis in between.

RS-485 is also a bus: up to 32 standard transceivers can hang on the same pair. Since a single pair carries both directions, only one node may drive it at a time. That is called half duplex, and it is why the SN75176BP has separate enable pins for its driver and receiver.

The SN75176BP pins

The SN75176BP is the PDIP-8 (P package) version of the SN75176B. The logic pins are on one side and the bus and supply pins on the other (TI SLLS101I, Figure 4-1):

  • Pin 1 – R: receiver output. Logic 1 when A − B ≥ +0.2 V, logic 0 when A − B ≤ −0.2 V. Goes high-impedance (Z) when /RE is high.
  • Pin 2 – /RE: receiver enable, active low. Low = R is driven; high = R floats.
  • Pin 3 – DE: driver enable, active high. High = the driver drives A and B; low = A and B are released (Z).
  • Pin 4 – D: driver input. With DE high, D = 1 makes A high and B low; D = 0 makes A low and B high.
  • Pin 5 – GND and pin 8 – VCC: a single 5 V supply (4.75–5.25 V).
  • Pin 6 – A and pin 7 – B: the bus. Driver outputs and receiver inputs are connected together inside the chip.
Top-view pinout of the SN75176BP in PDIP-8: pin 1 R, 2 /RE, 3 DE, 4 D on the left; pin 8 VCC, 7 B, 6 A, 5 GND on the right; notch and dot mark pin 1.
SN75176BP pinout seen from above (P package, PDIP-8), drawn from TI SLLS101I Figure 4-1.

The circuit: two nodes on one bus

Because DE is active high and /RE active low, the two pins can be tied together and driven by one microcontroller output, DIR. DIR = 1 turns the driver on and the receiver off (transmit); DIR = 0 does the reverse (listen). The UART's TX pin goes to D and its RX pin comes from R. The figure shows two such nodes joined by a twisted pair:

Two nodes, each a 5 V UART connected to an SN75176BP: TX to D (pin 4), RX from R (pin 1) with a 10 kΩ pull-up, one DIR line to both DE (pin 3) and /RE (pin 2). A (pin 6) and B (pin 7) form a twisted pair with a 120 Ω resistor at each end, 560 Ω bias resistors fitted at one point only, from A to +5 V and from B to GND, and a common GND wire.
Our own drawing of a minimal two-node RS-485 bus. The termination resistors sit at the two physical ends of the cable; the bias resistors are fitted at one point only.

Termination: a long cable behaves like a transmission line with a characteristic impedance of about 120 Ω for typical twisted pair. A 120 Ω resistor across A and B at each end absorbs the signal instead of reflecting it (TI Figure 7-1). For a few metres at 9600 baud you might get away without it, but it is the correct habit.

Bias (fail-safe): when no node is transmitting, every driver is off and A and B float. The receiver function table then says the output is unknown, and a UART sees noise as start bits. Two 560 Ω resistors, A to +5 V and B to GND, hold the idle bus at 5 V × 60 Ω / (560 + 60 + 560) Ω ≈ +0.25 V, since the two 120 Ω terminations in parallel make 60 Ω. That is above the +0.2 V threshold, so every receiver reads a steady 1 – exactly the UART idle level.

Pull-up on RX: while a node transmits, its own /RE is high and R floats. A 10 kΩ pull-up keeps the microcontroller's RX pin at idle (1) during that time instead of picking up noise.

One byte step by step

  1. Idle. All DIR lines are 0: every driver is off and every receiver is on. The bias network holds A − B at about +0.25 V, so all R outputs and RX pins are 1.
  2. Take the bus. Node 1 sets DIR = 1. The driver switches on within 120 ns (tPZH max) and, because TX is still idle at 1, drives A high and B low: A − B jumps to roughly +1.5…+2.5 V across the 60 Ω load. Node 1's own receiver is now off, and its pull-up holds RX at 1.
  3. Start bit. The UART sends the byte 0x55. The start bit sets TX = D = 0, so the driver reverses the pair: B is now higher than A. At node 2, A − B is well below −0.2 V and, about 35 ns later at most (receiver tPHL), R = 0. Node 2's UART sees the falling edge and starts timing.
  4. Data bits. The UART sends bit 0 first. 0x55 is binary 0101 0101, so the bits leave as 1, 0, 1, 0, 1, 0, 1, 0. Each bit flips the polarity of the pair, and node 2's R output repeats D with only a few tens of nanoseconds of delay – negligible compared with the 104 µs bit time at 9600 baud.
  5. Stop bit. TX = 1 again for one bit time: A − B is positive and node 2 latches its complete byte.
  6. Release the bus. Only after the stop bit has fully left the shift register does node 1 set DIR = 0. Use the UART's transmit complete flag, not transmit buffer empty, or you will cut off the last bit. The driver goes high-impedance (tPHZ max 250 ns), the bias network pulls A − B back to +0.25 V and every receiver keeps reading 1. Now node 2 may set its own DIR = 1 and reply in exactly the same way.
Timing diagram of one byte 0x55 from node 1 to node 2: DE and /RE go high one bit before the start bit, D follows the start bit, the bits 1 0 1 0 1 0 1 0 and the stop bit, A minus B swings between about plus and minus 1.5 to 2.5 V while the driver is on and rests at plus 0.25 V bias otherwise, and node 2's R output copies D.
One transaction: enable the driver, send start bit, eight data bits (least significant first) and stop bit, then release the bus. Timing not to scale.

Build it on a breadboard

Two SN75176BP chips are enough for a working link on a breadboard, for example between two Arduino Uno boards, two 8051 systems or a microcontroller and a USB-to-serial adapter with a 5 V TTL UART. You need:

  • 2 × SN75176BP (one per node), each with a 100 nF ceramic capacitor directly between pin 8 and pin 5; TI's layout example adds a 1.5 µF capacitor at the supply.
  • 2 × 120 Ω termination resistors, one at each end of the pair.
  • 2 × 560 Ω bias resistors at one node only (A to +5 V, B to GND).
  • 2 × 10 kΩ pull-ups from each R output (pin 1) to +5 V.
  • A twisted pair for A and B – one pair of a CAT5 cable works well – plus a third wire for ground between the nodes.
  • Software that sets DIR = 1 before sending and DIR = 0 after the transmit complete flag. Wire A to A and B to B on every node; swapping them inverts all the data.

Limits and pitfalls

  • 5 V only: VCC must be 4.75–5.25 V. The D, DE and /RE inputs use TTL levels (high ≥ 2 V), so a 3.3 V output can drive them, but the R output is a 5 V signal: do not connect it directly to a 3.3 V-only input. For a 3.3 V system, use a 3.3 V RS-485 transceiver or a proper level shifter.
  • Common-mode range: A and B may each sit anywhere from −7 V to +12 V relative to the chip's ground. That is why you still run a ground wire: RS-485 tolerates ground differences, but not unlimited ones. Use isolated transceivers between buildings.
  • No built-in fail-safe: an open, shorted or idle bus gives an undefined receiver output. Always add bias resistors at one point.
  • One talker at a time: if two drivers are on together, they fight. The driver's current limiting and thermal shutdown protect the chip, but the data is lost. Your protocol (for example a master that polls addressed slaves, as Modbus RTU does) must make sure nodes take turns.
  • Power and temperature: the chip draws typically 42 mA with the driver on and 26 mA with it off – not a low-power part. The SN75176B is specified for 0–70 °C (the SN65176B for −40…+105 °C).
  • Speed and length: TI specifies the device for buses up to 10 Mbit/s. Longer cables need lower bit rates; at 9600 baud, RS-485 typically reaches around 1200 m, while at the top speed you are limited to short runs. Keep stubs from the main line to each chip short.
  • The stocked parts are new old stock, unused and untested; test a link on the bench before you build it into a project.

Related guides

The idea of switching an output into a high-impedance state so that several devices can share one line is explained step by step in SN74LS126AN: four 3-state buffers on one shared bus, and the open-drain alternative in SN74LVC07A: how an open-drain buffer works. For a UART at the other end of the cable, the 80C31 in Build a complete 80C31 computer on breadboards has one built in, and 8051 assembly: a quick start with DOS/51 shows how to program it.

Source and stocked part

All pin numbers, function tables, voltage levels and switching times come from TI's data sheet SLLS101I (SN65176B, SN75176B, revised August 2025), which lists the SN75176BP as the PDIP-8 (P) package, 0 to 70 °C. The diagrams are our own drawings; check the data sheet before you design a product around the chip.

TI SN75176BP in the iMania shop · TI data sheet SLLS101I (PDF)