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A 4-bit number can name sixteen different things. The MC14515BCP turns that number into sixteen separate wires, pulls exactly one of them low, and - the part that makes it more than a plain decoder - remembers the number after the source has moved on.
A decoder takes a binary number and activates one output per possible value. Four input bits have 24 = 16 possible values, so a 4-to-16 decoder has sixteen outputs and activates exactly one of them at a time - never two, never none. That is the whole idea, and it is the same idea as the 3-to-8 decoder in our 74HC138 address-decoding guide, just one address bit wider. The four inputs are called D1, D2, D3 and D4 on the package; inside the chip they are the A, B, C and D of the truth table, with D1 = A as the least significant bit and D4 = D as the most significant.
The MC14514B and MC14515B are the same silicon with two output options. On the MC14514B the selected output goes to a logic 1 and the other fifteen sit at 0. On the MC14515B - the part in this guide - it is the other way around: the selected output is pulled to a logic 0 and the other fifteen sit at 1. Active-low selection is the normal convention for chip-select and enable pins, which is why this is usually the more useful of the two. Read the suffix carefully: a 14514 dropped into a 14515 socket will light up the fifteen channels you did not want.
In front of the decoder sits a 4-bit transparent latch, controlled by the Strobe pin. While Strobe is high the latch is transparent: the outputs follow D1-D4 immediately, and the chip behaves like a plain 4-to-16 decoder. When Strobe falls from 1 to 0 the latch captures the data that was present just before the transition and holds it. D1-D4 can then change freely, or go away entirely, and the selected output stays exactly where it was. The datasheet describes these latches as R-S type flip-flops, and the practical difference from a clocked register like the one in our MC74HC173N register guide is that there is no edge to wait for while Strobe is high - the data flows straight through. Hold Strobe permanently high and you simply never use the latch.
Here is one full transaction with a 5 V supply, using the number 10 (binary 1010) to select output S10. Start with Inhibit low and Strobe low, so an old selection is being held. First drive the data pins: D4 = 1, D3 = 0, D2 = 1, D1 = 0. Nothing has happened yet, because the latch is closed. Now raise Strobe. The latch opens, the decoder sees 1010, and after a propagation delay of typically 550 ns - up to 1100 ns guaranteed at 5 V with a 50 pF load - pin 20 (S10) falls to 0 while the other fifteen outputs rise to 1. Keep Strobe high for at least 350 ns; that is the minimum strobe pulse width. The data must have been stable for at least 250 ns before Strobe falls again, which is the setup time. Then drop Strobe to 0. The 1010 is now latched: you can let the data pins float off to whatever the rest of your circuit is doing, and S10 stays low until the next time you raise Strobe. Those three numbers - 550 ns typical delay, 350 ns strobe width, 250 ns setup - are the 5 V figures; at 10 V the setup time drops to 100 ns and the typical delay to 225 ns, and at 15 V to 75 ns and 150 ns. This family gets substantially faster on a higher supply.
Inhibit (pin 23) is the master off switch, and it does not disturb the latch. Drive it high and all sixteen outputs of the MC14515B go to logic 1 - which, on an active-low part, means nothing is selected. Drive it low again and the output that the latch is still holding comes straight back; the inhibit propagation delay is typically 400 ns and at most 800 ns at 5 V. This is what you use to blank a multiplexed display between digits, or to park the whole decoder while something else drives the same lines. Note that Inhibit high produces the opposite idle level on the two options: all outputs go to 1 on the MC14515B, and all go to 0 on the MC14514B.
The MC14515BCP comes in a 24-pin plastic DIP - PDIP-24, P suffix, case 709-02 in Motorola and onsemi documentation. Viewed from above with the notch at the top, pin 1 is at the upper left and numbering runs down the left side and back up the right. One thing will catch you out if you wire from memory: the outputs are not in pin order. S0 is on pin 11, S1 on pin 9 and S2 on pin 10; S8 is on pin 18 and S9 on pin 17; S12 is on pin 14 and S13 on pin 13; S14 is on pin 16 and S15 on pin 15. Supply is VDD on pin 24 and VSS on pin 12, and the data inputs are split across both sides - D1 and D2 on pins 2 and 3, D3 and D4 on pins 21 and 22. Check every output against the diagram below rather than counting pins.
Supply range is 3.0 V to 18 V, which is the pleasant part of 4000B-series CMOS and the same range as the gates in our MC14002B four-input NOR guide and the flip-flops in our MC14027B J-K flip-flop guide. The unpleasant part is drive and speed. The datasheet rates these outputs for two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range; at 5 V the guaranteed sink current is only 0.51 mA at a 0.4 V output, and the guaranteed source current only 0.2 mA at 4.6 V. That is not enough to drive an LED directly, and not much of a bus either - put a buffer such as the one in our 74HCT541 bus-buffer guide in between if you need current. Speed is the bigger limitation: a typical 550 ns delay at 5 V is far too slow to decode addresses inside a 1 MHz 6502 cycle, so this is not a replacement for the 74HC138 in that role. Where it is excellent is anything slow and wide - selecting one of sixteen channels, scanning a keyboard matrix, stepping a rotary selector, or holding a digit select for a display driver like the one in our MC74HC4511N 7-segment guide - especially when you want the selection to stay put without a microcontroller holding four pins steady forever.
The exact part described here, Motorola MC14515BCP in PDIP-24, is in stock at iMania: MC14515BCP - 4-bit latch and 4-to-16 decoder (active low).
Sources: function, pin assignment, truth table, drive and timing from the onsemi MC14514B/MC14515B data sheet, Rev 10 (October 2025); the PDIP-24 / P suffix / case 709-02 package of the CP part is documented in Rev 6 (June 2006) of the same data sheet, archived here. All diagrams were drawn for this guide. onsemi Rev 10 PDF · Rev 6 PDF.
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